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LTC3564 2.25MHz, 1.25A Synchronous Step-Down Regulator
FEATURES

DESCRIPTIO
High Efficiency: Up to 96% Very Low Quiescent Current: Only 20A 1.25A Output Current 2.5V to 5.5V Input Voltage Range 2.25MHz Constant Frequency Operation No Schottky Diode Required Low Dropout Operation: 100% Duty Cycle 0.6V Reference Allows Low Output Voltages Shutdown Mode Draws 1A Supply Current Current Mode Operation for Excellent Line and Load Transient Response Overtemperature Protected Low Profile (1mm) ThinSOTTM and 6-Lead (2mm x 3mm) DFN Packages
The LTC (R)3564 is a high efficiency monolithic synchronous buck regulator using a constant frequency, current mode architecture. Supply current during operation is only 20A, dropping to 1A in shutdown. The 2.5V to 5.5V input voltage range makes the LTC3564 ideally suited for single Li-Ion battery-powered or 3.3V to 5V input voltage applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Automatic Burst Mode(R) operation increases efficiency at light loads, further extending battery runtime. Switching frequency is internally set at 2.25MHz, allowing the use of small surface mount inductors and capacitors. The internal synchronous switch increases efficiency and eliminates the need for an external Schottky diode. Low output voltages are easily supported with the 0.6V feedback reference voltage. The LTC3564 is available in low profile (1mm) ThinSOT and 6-Lead (2mm x 3mm) DFN packages.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6498466, 6611131.
APPLICATIO S

Cellular Telephones Wireless and DSL Modems Digital Still Cameras Media Players Portable Instruments Point of Load Regulation
TYPICAL APPLICATIO
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10
VOUT = 1.8V
1.1H VIN CIN 22F CER VIN SW 22pF COUT 22F CER 634k 316k
3564 TA01a
VOUT 1.8V
LTC3564 RUN GND VFB
0 0.1
1
10 100 1000 OUTPUT CURRENT (mA)
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10 1 POWER LOSS (W) 0.1 0.01 0.001 VIN = 2.7V VIN = 3.6V VIN = 4.2V 0.0001 0.00001 10000
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LTC3564
ABSOLUTE AXI U RATI GS (Note 1)
Operating Junction Temperature Range (Notes 2, 3, 6) ...................................... - 40C to 125C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C Input Supply Voltage .................................. - 0.3V to 6V RUN, VFB Voltages ..................................... - 0.3V to VIN SW Voltage (DC) ......................... - 0.3V to (VIN + 0.3V)
PI CO FIGURATIO
TOP VIEW VFB 1 GND 2 VIN 3
5 RUN
4 SW
S5 PACKAGE 5-LEAD PLASTIC TSOT-23 TJMAX = 125C, JA = 215C/ W, JC = 50C/ W
ORDER I FOR ATIO
LEAD FREE FINISH LTC3564ES5#PBF LTC3564IS5#PBF LTC3564EDCB#PBF LTC3564IDCB#PBF TAPE AND REEL
LTC3564ES5#TRPBF LTC3564IS5#TRPBF LTC3564EDCB#TRPBF LTC3564IDCB#TRPBF
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating junction temperature range, otherwise specifications are TA = 25C. VIN = 3.6V unless otherwise specified.
SYMBOL IVFB VFB VFB IPK VLOADREG VIN PARAMETER Feedback Current Regulated Feedback Voltage Reference Voltage Line Regulation Peak Inductor Current Output Voltage Load Regulation Input Voltage Range
CONDITIONS
(Note 4) VIN = 2.5V to 5.5V (Note 4) VIN = 3V, VFB = 0.5V, Duty Cycle < 35%
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TOP VIEW SW 1 PGND 2 VIN 3 7 6 RUN 5 SGND 4 VFB
DCB PACKAGE 6-LEAD (2mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 64C/ W, JC = 10.6C/ W EXPOSED PAD (PIN 7) IS SGND, MUST BE SOLDERED TO PCB
PART MARKING* LTCYJ LTCYJ LDTQ LDTQ
PACKAGE DESCRIPTION 5-Lead Plastic TSOT-23 5-Lead Plastic TSOT-23 6-Lead (2mm x 3mm) Plastic DFN 6-Lead (2mm x 3mm) Plastic DFN
TEMPERATURE RANGE -40C to 125C -40C to 125C -40C to 125C -40C to 125C
MIN
TYP 0.6 0.04 2.0 0.5
MAX 30 0.6120 0.4 2.5 5.5
UNITS nA V %/V A % V
0.5880 1.5 2.5
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LTC3564
ELECTRICAL CHARACTERISTICS
The denotes specifications which apply over the full operating junction temperature range, otherwise specifications are TA = 25C. VIN = 3.6V unless otherwise specified.
SYMBOL IS PARAMETER Input DC Bias Current Active Mode Sleep Mode Shutdown Oscillator Frequency RDS(ON) of P-Channel FET RDS(ON) of N-Channel FET SW Leakage RUN Threshold RUN Leakage Current Soft-Start Time VFB from 10% to 90% Full Scale CONDITIONS (Note 5) VFB = 0.5V or VOUT = 90%, ILOAD = 0A VFB = 0.62V or VOUT = 103%, ILOAD = 0A VRUN = 0V, VIN = 4.2V VFB = 0.6V or VOUT = 100% S5 Package DCB Package S5 Package DCB Package VRUN = 0V, VSW = 0V or 5V, VIN = 5V

MIN
TYP 300 20 0.1
MAX 400 35 1 2.7 0.2 0.2 1 1.5 1 1.2
UNITS A A A MHz A V A ms
fOSC RPFET RNFET ILSW VRUN IRUN tSOFTSTART
1.8
2.25 0.15 0.15 0.15 0.15 0.01
0.3 0.6
1 0.01 0.9
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliabilty and lifetime. Note 2: The LTC3564E is guaranteed to meet performance specifications from 0C to 125C junction temperature. Specifications over the -40C to 125C operating junction termperature range are assured by design, characterization and correlation with statistical process controls. The LTC3564I is guaranteed over the full -40C to 125C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125C.
Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: LTC3564ES5: TJ = TA + (PD)(215C/W) LTC3564EDCB: TJ = TA + (PD)(64C/W) Note 4: The LTC3564 is tested in a proprietary test mode. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability.
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LTC3564 TYPICAL PERFOR A CE CHARACTERISTICS
Efficiency vs Input Voltage
100 IOUT = 100mA 90
EFFICIENCY (%)
EFFICIENCY (%)
EFFICIENCY (%)
80 70 60 50 40
IOUT = 1.25A IOUT = 10mA IOUT = 1mA
IOUT = 0.1mA VOUT = 1.8V 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) 5.0 5.5
3564 G01
Reference Voltage vs Temperature
615
OSCILLATOR FREQUENCY (MHz)
2.30 2.25 2.20 2.15 2.10 2.05
FREQUENCY VARIATION (%)
610
REFERENCE VOLTAGE (mV)
605 600 595 590 585 -50 -25
50 25 75 0 TEMPERATURE (C)
Load Regulation
1.00 0.75
VOUT ERROR (%)
VOUT = 1.8V
VOUT ERROR (%)
0.50 0.25 0 -0.25 -0.50 0 200 400 600 800 1000 1200 1400 OUTPUT CURRENT (mA)
3564 G07
RDS(ON) ()
4
UW
100
TA = 25C, VIN = 3.6V, unless otherwise specified.
Efficiency vs Output Current
100 90 80 70 60 50 40 30 20 10 0 0.1 1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 100 1000 OUTPUT CURRENT (mA) 10000
3564 G02
Efficiency vs Output Current
100 90 80 70 60 50 40 30 20 10 0 0.1 1 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 100 1000 OUTPUT CURRENT (mA) 10000
3564 G04
VOUT = 1.2V
VOUT = 1.5V
Oscillator Frequency vs Temperature
2.40 2.35 6 4 2 0 -2 -4 -6
Frequency Variation vs VIN
125
2.00 -50 -25
0
50 75 25 TEMPERATURE (C)
100
125
-8 2.5
3.0
3.5
4.0 VIN (V)
4.5
5.0
5.5
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Line Regulation
0.6 0.4 0.2 0 -0.2 0.05 VOUT = 1.8V ILOAD = 400mA 0.25
RDS(ON) vs Input Voltage
0.20 MAIN SWITCH 0.15
0.10
SYNCHRONOUS SWITCH
-0.4 -0.6
0 2.5 3.0 3.5 4.0 4.5 INPUT VOLTAGE (V) 5.0 5.5
3564 G08
2.5
3.0
3.5 4.0 4.5 INPUT VOLTAGE (V)
5.0
5.5
3564 G09
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LTC3564 TYPICAL PERFOR A CE CHARACTERISTICS
RDS(ON) vs Temperature
0.30 0.25
SUPPLY CURRENT (A)
35
0.20
RDS(ON) ()
SUPPLY CURRENT (A)
MAIN SWITCH
0.15 0.10 0.05 0 -50 -25 SYNCHRONOUS SWITCH
50 25 75 0 TEMPERATURE (C)
Switch Leakage vs Temperature
600 SYNCHRONOUS SWITCH MAIN SWITCH 500
SWITCH LEAKAGE (nA)
SWITCH LEAKAGE (pA)
400 300 200 100 0 -50 -25
50 25 75 0 TEMPERATURE (C)
UW
100
3564 G10
TA = 25C, VIN = 3.6V, unless otherwise specified.
Supply Current vs Supply Voltage
40 35 30 25 20 15
Supply Current vs Temperature
VIN = 3.6V RUN = VIN ILOAD = 0A
30
25
20
15
10
125
2.5
3.0
3.5 4.0 4.5 SUPPLY VOLTAGE (V)
5.0
5.5
3564 G11
10 -50 -25
50 25 75 0 TEMPERATURE (C)
100
125
3564 G12
Switch Leakage vs Input Voltage
2500 RUN = 0V
2000 MAIN SWITCH 1500
1000 SYNCHRONOUS SWITCH
500
100
125
0
0
1
2 3 4 INPUT VOLTAGE (V)
5
6
3564 G14
3564 G13
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LTC3564 TYPICAL PERFOR A CE CHARACTERISTICS
Burst Mode Operation
RUN 2V/DIV
SW 2V/DIV VOUT 50mV/DIV AC COUPLED IL 200mA/DIV
VIN = 3.6V VOUT = 1.8V ILOAD = 40mA
2.5s/DIV
Load Step
VOUT 100mV/DIV AC COUPLED
IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 0A TO 1.25A
3564 G18
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UW
TA = 25C, VIN = 3.6V, unless otherwise specified.
Start-Up from Shutdown
RUN 2V/DIV VOUT 1V/DIV
Start-Up from Shutdown
VOUT 1V/DIV IL 500mA/DIV
3564 G15
IL 1A/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 0mA 400s/DIV
3564 G16
VIN = 3.6V VOUT = 1.8V ILOAD = 1.25A
400s/DIV
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Load Step
VOUT 100mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 50mA TO 1.25A
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Load Step
VOUT 100mV/DIV AC COUPLED IL 1A/DIV
ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 0.25A TO 1.25A
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LTC3564
PI FU CTIO S
VFB (Pin 1/Pin 4) : Feedback Pin. Receives the feedback voltage from an external resistive divider across the output. GND (Pin 2/NA): Ground Pin. VIN (Pin 3/Pin 3): Main Supply Pin. Must be closely decoupled to GND, Pin 2, with a 10F or greater ceramic capacitor. SW (Pin 4/Pin 1): Switch Node Connection to Inductor. This pin connects to the drains of the internal main and synchronous power MOSFET switches.
FU CTIO AL DIAGRA
SLOPE COMP OSC OSC
FREQ SHIFT VFB 0.6V
EA
VIN RUN 0.6V REF
SHUTDOWN
-
IRCMP
+
W
-
+
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(S5/DCB)
RUN (Pin 5/Pin 6): Run Control Input. Forcing this pin above 1.5V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1A supply current. Do not leave RUN floating. PGND (NA/Pin 2): Main Power Ground Pin. Connect to the (-) terminal of COUT, and (-) terminal of CIN. SGND (NA/Pins 5, 7): The Signal Ground Pin. All small signal components and compensation components should be connected to this ground (see Board Layout Considerations.)
0.65V
VIN
- +
0.52V
- +
BURST S R Q Q
SLEEP
-
ICOMP
+
RSENSE
RS LATCH
SWITCHING LOGIC AND BLANKING CIRCUIT
ANTISHOOTTHRU
SW
GND
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LTC3564
OPERATIO
Main Control Loop The LTC3564 uses a constant frequency, current mode step-down architecture. Both the main (P-channel MOSFET) and synchronous (N-channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cycle when the oscillator sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor current at which ICOMP resets the RS latch, is controlled by the output of error amplifier EA. When the load current increases, it causes a slight decrease in the feedback voltage, FB, relative to the 0.6V reference, which in turn, causes the EA amplifier's output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator IRCMP, or the beginning of the next clock cycle. Burst Mode Operation The LTC3564 is capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. In Burst Mode operation, the peak current of the inductor is set to approximately 180mA regardless of the output load. Each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. In between these burst events, the power MOSFETs and any unneeded circuitry are turned off, reducing the quiescent current to 20A. In this sleep state, the load current is being supplied solely from the output capacitor. As the output voltage droops, the EA amplifier's output rises above the sleep threshold signaling the BURST comparator to trip and turn the top MOSFET on. This process repeats at a rate that is dependent on the load demand.
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(Refer to Functional Diagram)
Short-Circuit Protection When the output is shorted to ground, the inductor current may exceed the maximum inductor peak current if not allowed enough time to decay. To prevent the inductor current from running away, the bottom N-channel MOSFET is allowed to stay on for more than one cycle, thereby allowing the inductor current time to decay. Dropout Operation As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the maximum on-time. Further reduction of the supply voltage forces the main switch to remain on for more than one cycle until it reaches 100% duty cycle. The output voltage will then be determined by the input voltage minus the voltage drop across the P-channel MOSFET and the inductor. An important detail to remember is that at low input supply voltages, the RDS(ON) of the P-channel switch increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when the LTC3564 is used at 100% duty cycle with low input voltage (See Thermal Considerations in the Applications Information section). Slope Compensation and Inductor Peak Current Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by adding a compensating ramp to the inductor current signal at duty cycles in excess of 40%. Normally, this results in a reduction of maximum inductor peak current for duty cycles > 40%. However, the LTC3564 uses a patented scheme that counteracts this compensating ramp, which allows the maximum inductor peak current to remain unaffected throughout all duty cycles.
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LTC3564
APPLICATIO S I FOR ATIO
L VIN CIN VIN SW CF LTC3564 R2 RUN GND VFB R1
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Figure 1. LTC3564 General Schematic
The basic LTC3564 application circuit is shown in Figure 1. External component selection is driven by the load requirement and begins with the selection of L followed by CIN and COUT. Inductor Selection For most applications, the value of the inductor will fall in the range of 0.47H to 2.2H. Its value is chosen based on the desired ripple current. Large value inductors lower ripple current and small value inductors result in higher ripple currents. Higher VIN or VOUT also increases the ripple current as shown in equation 1. A reasonable starting point for setting ripple current is IL = 500mA (40% of 1.25A).
IL = V 1 VOUT 1- OUT VIN ( f )(L )
(1)
Table 1. Representative Surface Mount Inductors
MANUFATURER Toko Sumida PART NUMBER A915AY-1R1M-DC53LC 1070AS-1R0N-DB3020C CDRH4D18C/LD-1R1 CDRH3D14-1R2 CR5D11-1R0 CDRH2D18/HP-2R2 FDK Coilcraft Vishay MIPW3226D0R9M LPO6610-122ML LPS4018-222ML IHLP1616ABERR47M01 IHLP1616ABER1R0M01 VALUE (H) 1.1 1 1.1 1.2 1 2.2 0.9 1.2 2.2 0.47 1 MAX DC CURRENT (A) 3.25 1.9 2.1 2.2 2.2 1.6 1.4 2.1 2.5 5 4 DCR (m) 16 47 24 36 40 48 70 80 70 20 45 HEIGHT (mm) 3 2 2 1.5 1.2 2 1 1 1.8 1.2 1.2
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VOUT COUT
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The DC current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. Thus, a 1.5A rated inductor should be enough for most applications (1.25A + 250mA). For better efficiency, choose a low DC-resistance inductor. The inductor value also has an effect on Burst Mode operation. The transition to low current operation begins when the inductor current peaks fall to approximately 300mA. Lower inductor values (higher IL) will cause this to occur at lower load currents, which can cause a dip in efficiency in the upper range of low current operation. In Burst Mode operation, lower inductance values will cause the burst frequency to increase. Inductor Core Selection Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on what the LTC3564 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3564 applications.
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LTC3564
APPLICATIO S I FOR ATIO
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET is a square wave of duty cycle VOUT/VIN. To prevent large voltage transients, a low ESR input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by:
[VOUT (VIN - VOUT )]1/ 2 CIN required IRMS IOMAX
VIN This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that the capacitor manufacturer's ripple current ratings are often based on 2000 hours of life. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Always consult the manufacturer if there is any question. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple VOUT is determined by:
1 VOUT IL ESR + 8fC OUT
where f = operating frequency, COUT = output capacitance and IL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since IL increases with input voltage.
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Aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. In the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum capacitors. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3564's control loop does not depend on the output capacitor's ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. However, care must be taken when ceramic capacitors are used at the input and the output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
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LTC3564
APPLICATIO S I FOR ATIO
Output Voltage Programming
R2 VOUT = 0.6 V 1 + R1
POWER LOSS (W)
In the adjustable version, the output voltage is set by a resistive divider according to the following formula:
(2)
The external resistive divider is connected to the output, allowing remote voltage sensing as shown in Figure 2.
0.6V VOUT 5.5V R2 VFB LTC3564 GND
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R1
Figure 2. Setting the LTC3564 Output Voltage
Efficiency Considerations The efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency = 100% - (L1 + L2 + L3 + ...) where L1, L2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in LTC3564 circuits: VIN quiescent current and I2R losses. The VIN quiescent current loss dominates the efficiency loss at very low load currents whereas the I2R loss dominates the efficiency loss at medium to high load currents. In a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in Figure 3.
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1 VIN = 3.6V 0.1 0.01 0.001 VOUT = 1.2V VOUT = 1.5V VOUT = 1.8V 1 10 100 1000 LOAD CURRENT (A) 10000
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0.0001 0.1
Figure 3. Power Lost vs Load Current
1. The VIN quiescent current is due to two components: the DC bias current as given in the electrical characteristics and the internal main switch and synchronous switch gate charge currents. The gate charge current results from switching the gate capacitance of the internal power MOSFET switches. Each time the gate is switched from high to low to high again, a packet of charge, dQ, moves from VIN to ground. The resulting dQ/dt is the current out of VIN that is typically larger than the DC bias current. In continuous mode, IGATECHG = f(QT + QB) where QT and QB are the gate charges of the internal top and bottom switches. Both the DC bias and gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 2. I2R losses are calculated from the resistances of the internal switches, RSW, and external inductor RL. In continuous mode, the average output current flowing through inductor L is "chopped" between the main switch and the synchronous switch. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 - DC)
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LTC3564
APPLICATIO S I FOR ATIO
The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses, simply add RSW to RL and multiply the result by the square of the average output current. Other losses including CIN and COUT ESR dissipative losses and inductor core losses which generally account for less than 2% total additional loss. Thermal Considerations In most applications the LTC3564 does not dissipate much heat due to its high efficiency. But, in applications where the LTC3564 is running at high ambient temperature with low supply voltage and high duty cycles, such as in dropout, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 150C, both power switches will be turned off and the SW node will become high impedance. To avoid the LTC3564 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TR = (PD)(JA) where PD is the power dissipated by the regulator and JA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: T J = TA + TR where TA is the ambient temperature. As an example, consider the LTC3564 in dropout at an input voltage of 2.7V, a load current of 1.2A and an ambient temperature of 70C. From the typical perfor-
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mance graph of switch resistance, the RDS(ON) of the P-channel switch at 70C is approximately ~0.2. Therefore, power dissipated by the part is: PD = ILOAD2 * RDS(ON) = 288mW For the SOT-23 package, the JA is 215C/ W. Thus, the junction temperature of the regulator is: TJ = 70C + (0.288)(215) = 131.9C which is above the maximum junction temperature of 125C. Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)). Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to (ILOAD * ESR), where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT, which generates a feedback error signal. The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability problem. For a detailed explanation of switching control loop theory, see Application Note 76. A second, more severe transient is caused by switching in loads with large (>1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 * CLOAD). Thus, a 10F capacitor charging to 3.3V would require a 250s rise time, limiting the charging current to about 130mA.
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LTC3564
APPLICATIO S I FOR ATIO
R1
VIN
Figure 4a. LTC3564 TSOT-23 Layout Diagram
VOUT
+ -
VIN
Figure 4b. LTC3564 DFN Layout Diagram
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1 VFB GND 4 L1 CFWD RUN 5 R2 LTC3564 2 CIN 3 VIN SW
W
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-
COUT
+
VOUT
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BOLD LINES INDICATE HIGH CURRENT PATH
CFWD
R2 L1 COUT CIN 3 VIN VFB 4
1
SW
RUN
6
LTC3564 2 PGND SGND 5 R1
3564 F04b
BOLD LINES INDICATE HIGH CURRENT PATH
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LTC3564
APPLICATIO S I FOR ATIO
VIA TO GND
VIN
VIA TO VOUT R2 CFWD
Figure 5a. LTC3564 TSOT-23 Suggested Layout
VOUT
COUT SW
PGND
CIN R2 VIN VIA TO VOUT
3564 F05b
Figure 5b. LTC3564 DFN Suggested Layout
14
U
R1 VIA TO VIN PIN 1 LTC3564 SW L1 VOUT CIN GND
3564 F05a
W
U
U
COUT
L1 VIA TO VIN
1 2 3 7
6 5
SGND
R1 4 VFB CFWD
3564f
LTC3564
APPLICATIO S I FOR ATIO
PC Board Layout Checklist
When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3564. These items are also illustrated graphically in Figures 4 and 5. Check the following in your layout: 1. The power traces, consisting of the GND trace, the SW trace and the VIN trace should be kept short, direct and wide. 2. Does the VFB pin connect directly to the feedback resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground. 3. Does the (+) plate of CIN connect to VIN as closely as possible? This capacitor provides the AC current to the internal power MOSFETs. 4. Keep the switching node, SW, away from the sensitive VFB node. 5. Keep the (-) plates of CIN and COUT as close as possible. Design Example As a design example, assume the LTC3564 is used in a single lithium-ion battery-powered cellular phone application. The VIN will be operating from a maximum of 4.2V down to about 2.7V. The load current requirement is a maximum of 1.25A but most of the time it will be in standby mode, requiring only 2mA. Efficiency at both low
EFFICIENCY (%)
VIN 2.7V TO 4.2V
3 CIN** 22F CER 5
VIN
SW
4
1.1H* 22pF
LTC3564 RUN GND 2 VFB 1 1M 316k
3564 F06a
*TOKO A915AY-1R1M (D53LC SERIES) ** TAIYO YUDEN JMK316BJ226ML
Figure 6a. Typical Application
U
and high load currents is important. Output voltage is 2.5V. With this information we can calculate L using equation (1),
W
U
U
L=
V 1 VOUT 1 - OUT ( f)(IL ) VIN
(3)
Substituting VOUT = 2.5V, VIN = 4.2V, IL = 500mA and f = 2.25MHz in equation (3) gives:
L= 2.5V 2 . 5V 1- = 0 . 9H H 2.25MHz(500mA) 4 . 2V
A 1H or 1.1H inductor works well for this application. For best efficiency choose a 1.5A or greater inductor with less than 0.1 series resistance. CIN will require an RMS current rating of at least 0.6A ILOAD(MAX)/2 at temperature and COUT will require an ESR of less than 0.125. In most cases, a ceramic capacitor will satisfy this requirement. For the feedback resistors, choose R1 = 316k. R2 can then be calculated from equation (2) to be: V R2 = OUT - 1 R1 = 1000k 0.6 Figure 6 shows the complete circuit along with its efficiency curve.
100 95 90 85 80 75 70 65 VIN = 2.7V VIN = 3.6V VIN = 4.2V 1000
3564 F06b
VOUT 2.5V COUT** 22F CER
VOUT = 2.5V 60 1 0.1 10 100 OUTPUT CURRENT (mA)
Figure 6b. Efficiency vs Output Current
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LTC3564
TYPICAL APPLICATIO S
Single Li-Ion 1.8V/1.25A Regulator for High Efficiency and Small Footprint
VIN 2.7V TO 5.5V
100 90 80
EFFICIENCY (%)
70 60 50 40 30 20 10 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10000
VOUT = 1.8V 0 1 10 100 1000 0.1 OUTPUT CURRENT (mA)
16
U
4 CIN** 10F CER 1
VIN
SW
3
1H* 22pF
VOUT 1.8V COUT 22F CER
LTC3564 RUN GND 2 VFB 5 806k 402k
*MURATA LQH32CN2R2M33 ** TAIYO YUDEN JMK316BJ106ML TAIYO YUDEN JMK316BJ226ML-BR 3564 TA02a
VOUT 100mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV VIN = 3.6V 20s/DIV VOUT = 1.8V ILOAD = 100mA TO 1.25A
3564 TA02c
3564 TA02b
3564f
LTC3564
TYPICAL APPLICATIO S
Single Li-Ion 1.5V/1.25A Regulator for High Efficiency and Low Profile, <1mm Height
VIN 2.7V TO 5.5V
100 90 80
VOUT 100mV/DIV AC COUPLED IL 1A/DIV ILOAD 1A/DIV
EFFICIENCY (%)
70 60 50 40 30 20 10 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10000
VIN = 3.6V 20s/DIV VOUT = 1.5V ILOAD = 0.3A TO 1.25A
3564 TA04c
VOUT = 1.5V 0 1 10 100 1000 0.1 OUTPUT CURRENT (mA)
U
4 CIN** 10F CER 1
VIN
SW
3
0.9H* 22pF
VOUT 1.5V COUT** 10Fx2 CER
LTC3564 RUN GND 2 VFB 5 604k 402k
3564 TA03a
*FDK MIPW3226D0R9M **TAIYO YUDEN JMK107BJ106MA
3564 TA03b
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LTC3564
PACKAGE DESCRIPTIO
0.62 MAX
0.95 REF
3.85 MAX 2.62 REF
RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR
0.20 BSC 1.00 MAX DATUM `A'
0.30 - 0.50 REF 0.09 - 0.20 (NOTE 3) NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193
18
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S5 Package 5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
2.90 BSC (NOTE 4) 1.22 REF 1.4 MIN 2.80 BSC 1.50 - 1.75 (NOTE 4) PIN ONE 0.30 - 0.45 TYP 5 PLCS (NOTE 3) 0.95 BSC 0.80 - 0.90 0.01 - 0.10 1.90 BSC
S5 TSOT-23 0302 REV B
3564f
LTC3564
PACKAGE DESCRIPTIO
3.55 0.05
1.65 0.05 (2 SIDES) PACKAGE OUTLINE
2.15 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 2.00 0.10 (2 SIDES) R = 0.115 TYP 4 6 0.40 0.10
PIN 1 BAR TOP MARK (SEE NOTE 6) 3 0.200 REF 0.75 0.05 1
NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
U
DCB Package 6-Lead Plastic DFN (2mm x 3mm)
(Reference LTC DWG # 05-08-1715 Rev A)
0.70 0.05 0.25 0.05 0.50 BSC 1.35 0.05 (2 SIDES) R = 0.05 TYP 3.00 0.10 (2 SIDES) 1.65 0.10 (2 SIDES) PIN 1 NOTCH R0.20 OR 0.25 x 45 CHAMFER
(DCB6) DFN 0405
0.25 0.05 0.50 BSC
1.35 0.10 (2 SIDES) 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD
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LTC3564 RELATED PARTS
PART NUMBER LTC3405/LTC3405A LTC3406/LTC3406B LTC3407/LTC3407-2 LTC3409 LTC3410/LTC3410B LTC3411 LTC3412 LTC3441/LTC3442 LTC3443 LTC3531/LTC3531-3 LTC3531-3.3 LTC3532 LTC3542 LTC3548/LTC3548-1 LTC3548-2 LTC3560 LTC3561 DESCRIPTION 300mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converters 600mA (IOUT), 1.5MHz, Synchronous Step-Down DC/DC Converters Dual 600mA/800mA (IOUT), 1.5MHz/2.25MHz, Synchronous Step-Down DC/DC Converters 600mA (IOUT), 1.7MHz/2.6MHz, Synchronous Step-Down DC/DC Converter 300mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converters 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 2.5A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter 1.2A (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converters 200mA (IOUT), 1.5MHz, Synchronous Buck-Boost DC/DC Converters 500mA (IOUT), 2MHz, Synchronous Buck-Boost DC/DC Converter 500mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converter Dual 400mA/800mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converters 800mA (IOUT), 2.25MHz, Synchronous Step-Down DC/DC Converters 1.25A (IOUT), 4MHz, Synchronous Step-Down DC/DC Converter COMMENTS 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 20A, ISD = <1A, ThinSOT Package 96% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 20A, ISD = <1A, ThinSOT Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40A, ISD = <1A, MS10E, DFN Packages 96% Efficiency, VIN: 1.6V to 5.5V, VOUT(MIN) = 0.6V, IQ = 65A, ISD = <1A, DFN Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 26A, ISD = <1A, SC70 Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD = <1A, MS10, DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 60A, ISD = <1A, TSSOP-16E Package 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 50A, ISD = <1A, DFN Package 95% Efficiency, VIN: 1.8V to 5.5V, VOUT(MIN): 2V to 5V, IQ = 16A, ISD = <1A, ThinSOT, DFN Packages 95% Efficiency, VIN: 2.4V to 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 35A, ISD = <1A, MS10, DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN): 0.6V, IQ = 26A, ISD = <1A, ThinSOT, 2 x 2 DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 40A, ISD = <1A, MS10E, DFN Packages 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.6V, IQ = 16A, ISD = <1A, ThinSOT Package 95% Efficiency, VIN: 2.5V to 5.5V, VOUT(MIN) = 0.8V, IQ = 240A, ISD = <1A, DFN Package
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
LT 0608 * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2008

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